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The fifth generation (5G) communication has been a hotspot of research and development. Low-density parity-check (LDPC) codes were included in the key protocol of the 5G wireless communication standard. LDPC codes can achieve the error correction capabilities close to Shannon limit. However, LDPC encoding involves complex matrix operations which have a great influence on efficiency. To meet the throughput requirement for the 5G wireless communication standard, high performance LDPC encoder must be explored.
In the past decade, researchers and engineers try to accelerate LDPC encoding by improving encoding algorithm and using high-performance computing platform. So, the question is, if we can design an encoder exploiting the properties of LDPC codes and the properties of the hardware?
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IEEE/ICACT20210136 Slide.04
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