IEEE/ICACT20240055 Slide.09
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IEEE/ICACT20240055 Slide.09
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• - This study presents the implementation of a CMOS broadband on-chip antenna for D-band applications. As depicted in Figure 1, the antenna's structure consists of an on-chip patch array. This array utilizes the top metal layer, Metal6, which is 2.34 ¥ìm thick, to serve as the antenna. The bottom metal layer, Metal1, with a thickness of 0.53 ¥ìm, acts as the ground. The overall dimensions of this patch array antenna are 1200 ¡¿ 1200 ¥ìm©÷. | |
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