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IEEE/ICACT20260254 Slide.16        [Big Slide]       [YouTube]	Oral Presentation
	We implemented our system on the Zynq-7000 SoC using ZedBoard. The Processing System has a dual core ARM Cortex A9 for system control. The Programmable Logic hosts our MLP hardware accelerator. We used Vitis HLS 2022.2 for high level synthesis and Vivado 2022.2 for implementation. AXI Stream Interface ensures efficient data transfer between PS and PL.

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