| Virual Oral Presentation Slide by Slide |
IEEE/ICACT20260254 Slide.20
[Big Slide]
[YouTube] |
Oral Presentation |
|
|
In conclusion, we proposed an MLP based FPGA hardware accelerator for real time destination prediction. Our 4 layer architecture reduces complexity compared to LSTM while achieving 68.53 times speedup and sub millisecond response time. This demonstrates the viability of Edge AI inference in automotive embedded environments. | |
| [Go to Next Slide] |