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We implemented the parallel LDPC encoding algorithm on a Nvidia TITAN RTX GPU with 4608 cores, 1.77GHz core clock rate and 24GB of device memory. Our program is built on top of an Ubuntu 18.04 Linux OS with Nvidia CUDA driver 440.33 and CUDA toolkit release 10.2.
In our experiments, Z is set to 88, K is set to 1936 and the code rate is range from 1/3 to 8/9. We choose BG1 as the base graph to construct the parity check matrix H so that blockSize of calcPc function from 42 to 0 corresponds to the code rate from 1/3 to 8/9.
The throughput of the encoder is defined as the number of codeword bits that the encoder can process within the duration of the kernel functions. The information rate is defined as the number of information bits that the encoder can process within the same time. Thie figure shows the Gigabits per second throughput and information rate of our proposed implementation with K = 1936. |
IEEE/ICACT20210136 Slide.31
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