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IEEE/ICACT20210136 Slide.32        [Big Slide]	Oral Presentation
	This table compares the performances of our implementation with other implementations. It can be seen from Table II that compared with the implementation on FPGAs and CUDAs, our implementation of the 5G NR LDPC encoder has a higher performance and achieves the similar throughput as the expensive hardware implementation in [9]. Moreover, our software encoder is a flexible code rate encoder, while ASICs hardware encoders are fixed code rate. As a result, our proposed implementation achieves a high performance and flexibility of the LDPC encoding at a reasonable cost.

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