Now 3562 visitors
Today:0 Yesterday:0
Total: 138437 215S 51P 5R
2026-10-21, Week 43
Member Login
TACT Journal Homepage
Call for Paper
Committee
Find My Paper
Author Homepage
Statistics & History
Welcome Message
Paper Procedure
FAQ
Paper Archives
Outstanding Papers
Program & Proceedings
Presentation Platform
Hotel & Travel Info
Photo Gallery
Scheduler Login
Seminar
Archives Login
Sponsors


















Virual Oral Question and Answer
IEEE/ICACT20210161 Question.2
Questioner: lijingwei10@huawei.com    2021-02-07 		IEEE/ICACT20210161 Answer.2
Answer by Auhor angie_teo236@hotmail.com   2021-02-07
Silicon core width is recommended to be set at around 500nm in order to achieve a good compromise between effective index and polarizations, which system can benifit in this compromise? In terms of Effective Index, the higher the width, the higher the effective index. However, higher width may introduce higher order TE and TM polarized modes. So, 500 nm is a good compromise to get better index but avoid higher order TE and TM polarized modes.

Select Voice