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IEEE/ICACT20240055 Question.2 Questioner: mingannchung@ntut.edu.tw 2023-12-27 오후 5:51:13	IEEE/ICACT20240055 Answer.2 Answer by Auhor mingannchung@ntut.edu.tw 2023-12-27 오후 5:51:13
How does the proposed broadband on-chip antenna array design in this study address the challenges of antenna integration in CMOS technology?	The proposed design utilizes CMOS technology for implementing a broadband on-chip array antenna in the D-band frequency. This design addresses challenges like poor gain of chip antennas due to process relationships by proposing an antenna structure using a top metal layer (Metal6) and a bottom metal layer (Metal1) to prevent interference and reduce losses. The antenna achieves a peak gain of -5.95 dBi at 141 GHz and a bandwidth ranging from 140 to 202.5 GHz.

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