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Virual Oral Question and Answer
IEEE/ICACT20240058 Question.4
Questioner: jh.deng@saturn.yzu.edu.tw    2024-01-31 오전 1:04:56 		IEEE/ICACT20240058 Answer.4
Answer by Auhor mingannchung@ntut.edu.tw   2024-01-31 오전 1:04:56
The presentation did not seem to mention the height of the substrate. Could you please provide information on the height of the substrate, especially for metal6? The structure is composed of six metal layers (Metal1 to Metal6, including the top metal layer) separated by silicon dioxide and a silicon (Si) substrate. In the 0.18μm CMOS process, the top metal layer (Metal6) is designed as the antenna layer, with a thickness of 2.34μm, while the thickness of the Si substrate is 500μm.

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